Verilog
C++
RTL Coding
Static Timing Analysis
DFT
IP Core Development
Fibrechannel
SATA
USB
PCI
📍 Location: Bangalore, KA
Industry: IT
Job Type: Full Time
Job Summary:
Are you looking to build next-gen IP cores with a team of top-notch engineers? We are seeking a seasoned expert to lead RTL coding and verification using cutting-edge HDL technologies. Join us to shape the future of high-speed protocols in a dynamic and technically challenging environment.
Roles & Responsibilities:
Design and develop high-performance IP cores from scratch.
Execute RTL coding and rigorous verification using C, C++, and Verilog HDL.
Manage synthesis, static timing analysis (STA), and Design for Testability (DFT) workflows.
Formulate comprehensive verification strategies and detailed test plans.
Implement and optimize protocols such as Fibrechannel, SATA, USB, and PCI.
Requirements:
B.S. or equivalent degree in Electronics/Computer Science.
Minimum 5 years of hands-on experience in hardware description languages.
Strong expertise in Verilog, C, and C++ for system-level verification.
Proven track record with high-speed interface protocols (SATA/USB/PCI).
Willingness to relocate if required by the project needs.
Perks & Benefits:
Competitive salary package as per industry standards.
Opportunity to work on global projects with potential US relocation.
Exposure to advanced VLSI design and verification methodologies.
Professional growth in a specialized technology domain.
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